The field effect transistor forms the building block of many modern digital integrated electronic devices. In order to increase the active device density of electronic devices, thin film transistors have been developed which provide adequate transfer characteristics but do not require the use of bulk single-crystal semiconductor material. A thin film field effect transistor may use polycrystalline, amorphous or partially recrystallized semiconductor material comprising its channel.
An important characteristic of a field effect transistor is the depth of the channel region. Accordingly, the depth of the layer of semiconductor material forming the channel of a thin film transistor is extremely shallow. Depending upon the operational characteristics required of the particular device, the channel region is typically on the order of 100 to 2000 angstroms in depth. Because of this shallow nature of the channel layer, contacting the channel layer at the source and drain regions is extremely difficult. An etching process is required to open windows to the source and drain regions in order to make these contacts. These etching processes can very easily etch completely through the channel layer because of its shallow nature dramatically affecting the operational characteristics of the transistor.
A further requirement of conventional field effect transistors is that the resistances associated with the contacts to the source and drain regions of the transistor must be appropriately controlled. A common method for reducing the contact resistance of the source and drain regions is the formation of a silicide layer on the source and drain regions. In the context of a thin film transfer, any attempt to form a silicide layer on the source and drain region of a channel layer of a thin film device would also erode the channel layer as the formation of a silicide layer necessarily consumes the semiconductor material on which it is formed.
Accordingly, a need has arisen for a thin film transistor architecture which provides for efficient contact to the source and drain regions of the channel layer. A further need has arisen for a thin film transistor architecture which allows for the formation of a silicide layer in contact with the source and drain regions in order to reduce the contact resistances associated with the transistor without eroding the thin film of material used to form the channel of the transistor.